The present invention relates to a method of making wire connections of predetermined shape between a first connecting point located on a semiconductor chip and a second connecting point. During semiconductor assembly, the electrical connections between the semiconductor chip and the substrate which carries the semiconductor chip are produced by means of such wire connections. Such methods are known for example from the documents U.S. Pat. No. 4,327,860, U.S. Pat. No. 5,111,989, U.S. Pat. No. 5,395,035, U.S. Pat. No. 5,148,964, U.S. Pat. No. 5,192,018, U.S. Pat. No. 5,205,463 and EP 792 716.